All
Search
Images
Videos
Shorts
Maps
News
Copilot
More
Shopping
Flights
Travel
Notebook
Report an inappropriate content
Please select one of the options below.
Not Relevant
Offensive
Adult
Child Sexual Abuse
Length
All
Short (less than 5 minutes)
Medium (5-20 minutes)
Long (more than 20 minutes)
Date
All
Past 24 hours
Past week
Past month
Past year
Resolution
All
Lower than 360p
360p or higher
480p or higher
720p or higher
1080p or higher
Source
All
Dailymotion
Vimeo
Metacafe
Hulu
VEVO
Myspace
MTV
CBS
Fox
CNN
MSN
Price
All
Free
Paid
Clear filters
SafeSearch:
Moderate
Strict
Moderate (default)
Off
Filter
Jump to key moments of 4X2 Decoder in Gate Level Modeling
9:50
From 07:13
Testing the Decoder
Verilog Implementation of 2 4 Decoder Using Gate level Modeling
YouTube
VHDL Language
15:16
From 02:25
Gate Level Modeling
Multiplexer - Verilog Code on EDA playground|Switch level & Gate level
…
YouTube
PlanetSkillzz
5:21
From 03:00
Gate Level Modeling
4:1 MUX Using Gate-Level Modeling in Verilog | 16:1 MUX from 4:1 | With Test
…
YouTube
Maharshi Sanand Yadav T
6:45
From 02:12
Implementing NAND Gates
DECODER | Implement 2:4decoder using NAND gates
YouTube
ECE Academy Benefactor
19:05
From 03:05
Truth Table for Decoder
2-to-4 Decoder
YouTube
Jens Hannemann
9:30
From 00:05
Definition of Decoder
2 to 4 Decoder Design
YouTube
TutorialsPoint
7:06
From 00:10
Basic Concept of AND Gate
How to Build AND Gate using 4 to 1 MUX
YouTube
Dewan Ziaul Karim
9:35
Verilog Coding of Gate Level Design | Gate Level Design in ModelSim |
…
35.9K views
Oct 15, 2020
YouTube
Electro DeCODE
9:50
Verilog Implementation of 2 4 Decoder Using Gate level Modeling
14.1K views
Mar 20, 2016
YouTube
VHDL Language
31:36
Introduction to Gate Level Modeling in Verilog | Getting Started with Vi
…
7.4K views
6 months ago
YouTube
ALL ABOUT VLSI
13:17
Verilog Code for 2 to 4 Decoder in Modelsim with TestBench | Verilo
…
29.3K views
Nov 15, 2020
YouTube
Electro DeCODE
15:16
Multiplexer - Verilog Code on EDA playground|Switch level & Gate le
…
3.7K views
Jun 5, 2021
YouTube
PlanetSkillzz
40:37
Verilog HDL: The Ultimate Guide to Gate Level & Data Flow Modeling
377 views
5 months ago
YouTube
VLSI Simplified
14:15
4x2 Priority Encoder Explained | Truth Table, Logic Diagram | Digit
…
599 views
3 months ago
YouTube
Maharshi Sanand Yadav T
12:31
Gate level modeling | Digital Systems Design | Lec-22
540 views
Oct 7, 2024
YouTube
Education 4u
24:50
Gate-Level Modeling in Verilog (Part-1)
400 views
8 months ago
YouTube
Sagar TechGate
21:35
Gate level modelling in verilog || Verilog full course || All about VLS
…
389 views
Jan 1, 2025
YouTube
ALL ABOUT VLSI
17:35
Gate-Level Modeling in Verilog (Part-2)
208 views
8 months ago
YouTube
Sagar TechGate
3:14
Full Adder (Gate Level Modeling) | Verilog HDL | Synthesis & Simulat
…
268 views
Sep 21, 2024
YouTube
Technical Solutions
9:58
Gate level modeling of a 2:4decoder in Verilog HDL
534 views
May 18, 2021
YouTube
Circuits Analytica
21:36
RTL2GDS Demo Part 3.2: Gate-level Simulation
1.5K views
Feb 25, 2025
YouTube
Adi Teman
6:56
Verilog HDL PROGRAM | Full Adder | Gate Level Modeling | VLSI Desig
…
33.3K views
May 10, 2022
YouTube
LEARN THOUGHT
25:02
RTL2GDS Demo Part 3.1: Gate-level Simulation and Power Estimation
2.9K views
Feb 25, 2025
YouTube
Adi Teman
5:31
GATE LEVEL MODELLING #3: Design and verify Full adder usin
…
9.1K views
Jan 12, 2021
YouTube
AA
14:31
FULL ADDER Verilog Code Gate and Dataflow Modelling Styles wit
…
343 views
Oct 17, 2024
YouTube
Teaching Mentor
13:40
GATE 2015 ECE Realization of 1 to 8 DEMUX using two 2 to 4 Decoders
21.5K views
Mar 13, 2015
YouTube
GATE Paper Satish Bojjawar
4:25
How To Do 2 To 4 Line Decode Using Logic Gates Experiment |D
…
900 views
Nov 25, 2024
YouTube
Sai Tech & Entm't
9:00
Full Adder Design Using Gate Level Modeling in Verilog | Xilinx Vivad
…
106 views
Dec 13, 2024
YouTube
19:08
2-Bit Comparator using Gate Level Modeling in Verilog | Digital Desig
…
2.8K views
5 months ago
YouTube
ALL ABOUT VLSI
2:47
Reversible Logic Gate design in Cadence | Fredkin & Feynman Gat
…
903 views
7 months ago
YouTube
Success Point for VLSI
13:01
4 by 1 Multiplexer and 2 by 4 Decoder
109 views
9 months ago
YouTube
Sylvester Dzokoto
9:21
Building a 4-Bit Ripple Carry Adder: Step-by-Step Verilog Tutorial | VL
…
46.5K views
May 11, 2022
YouTube
LEARN THOUGHT
19:15
Verilog Code for Full Adder using Half Adder | Gate Level Modeling
…
861 views
6 months ago
YouTube
ALL ABOUT VLSI
13:09
how to make 2 to 4 decoder in proteus || 2 to 4 decoder simulatio
…
12.3K views
Feb 18, 2020
YouTube
Nelson Darwin Pak Tech
4:44
IC 74138 decoder: Implementation of Combinational circuit
2.1K views
Nov 23, 2024
YouTube
Learn with Dr. Shobha Nikam
15:57
gate level modeling | digital circuit design using logic gates
94 views
2 months ago
YouTube
vlsipro
9:25
HALF ADDER Verilog Code Gate and Dataflow Modelling Styles wit
…
356 views
Oct 17, 2024
YouTube
Teaching Mentor
See more
More like this
Feedback