Stromasys announces a major milestone for its PA-RISC emulation technology, releasing a new version designed to boost ...
MIPS is repositioning itself within the RISC-V ecosystem following the integration of the ARC Processor IP business acquired from Synopsys, moving beyond a CPU-centric model toward a broader processor ...
The LilyGo T-Display P4 is a pocket-sized device with a 4.1 inch display that looks like a smartphone from the front. But turn it sideways and it’s clear that this chunky handheld is more of a dev kit ...
Abstract: The on-chip processor of modern high-precision Global Navigation Satellite System (GNSS) receiver chips is required to perform signal processing and navigation computations for multiple ...
Though the RISC-V Summit North America is over, you can peruse the videos of most of the keynotes and sessions here. The list is quite long, so we picked a few and included them in this space, such as ...
HAIFA, Israel & SANTA CLARA, Calif.--(BUSINESS WIRE)--proteanTecs®, a global leader in deep data solutions for electronics health and performance monitoring, and Akeana, a provider of high-performance ...
proteanTecs®, a global leader in deep data solutions for electronics health and performance monitoring, and Akeana, a provider of high-performance RISC-V processor IP, today announced their ...
The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
On Wednesday, the startup disclosed plans for a complementary central processing unit leveraging the RISC-V open computing standard. The company unveiled Arbel, an enterprise-grade RISC-V core built ...
The MIPS I8500, unveiled at GlobalFoundries’ Technology Summit in Munich, is the company’s third-generation, four-thread-per-core processor built on the open RISC-V instruction set architecture. The ...
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